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January 11, 2005

How To Layout a Power Supply

"Power supply layout is as important as any other design consideration. The power supply engineer must be involved in parts placement and routing." -- Robert Kollman

What I said in How To Design a Power Supply applies to how to layout a power supply. There is an near infinite number of ways and if left to their own devices a new designer will usually do a poor job of it. For these designers, Papers like Topic 4, Constructing Your Power Supply - Layout Considerations, in the Texas Instruments 2004/05 Power Supply Design Seminar is highly useful.

My favorite quote from the author, Robert Kollman, is actually the summary at the end of the paper.

"Power supply layout is as important as any other design consideration. The power supply engineer must be involved in parts placement and routing. An understanding of AC and DC parasitics, grounding and cooling makes a successful design."

I added the emphasis on the second sentence because of its high importance. The power supply engineer needs to either sit elbow-to-elbow with the person doing the layout or spent time with him every few hours. Failure to do so can either ruin an otherwise good design or result in a schedule slip or cost over-run if the layout needs to be redone to avoid ruin. The reason is that there are innumerable ways a circuit can be layout and all of them have some compromises between performance, EMI, and thermal. Only the circuit designer who did the design and spent time in the lab getting to know their circuit has the detailed knowledge needed to make these tradeoffs and compromises. Both the designer and layout person need a crib sheet on the tradeoffs on this important task. This paper provides it by cramming an incredible amount of useful information in its 23 pages.

The papers organization is:

  • Introduction
  • DC Parasitics (Resistance)
  • AC Parasitics
  • Grounds and Grounding
  • Thermal Considerations
  • Design Examples
  • Summary


"There have been numerous articles written on this subject... because of its importance in ensuring a successful design. This article gathers useful guidelines and calculations to enable the neophyte as well as the experienced engineer to understand issues in physically realizing the electrical schematic."

Each of the following sections contains the necessary equations, figures, and tables to explain and solve the problems discussed.

DC Parasitics (Resistance)

"In high current power supplies, resistance of components is always an issue as it degrades efficiency, can create cooling problems, and may also impact regulation. Even with it being a problem, the resistance of the PWB traces is overlooked and adds to the issue."

Discussed are the impact of resistance on performance. The important topics of the dc resistance of traces and vias, the fact the copper plating is higher resistivity than pure copper, and the effect of temperature, skin effect, and proximity on effective resistance are discussed.

My own worst experiences with dc resistance affecting layout was when I have had logic layout designers with no power supply experience layout the PWB, applying their knowledge of layout gleaned from logic boards. Following their training and experience, they usually pick the wrong weight copper for each layer, never make the traces wide enough for the current or to minimize inductance, use a ground-plane blindly, often adding capacitance to ground where you do not want it, and seldom consider the current density and voltage drop in the vias. I've had the vias actually get too hot to touch. This experience led me to the ground rule of sitting elbow-to-elbow with the designer during layout to avoid constantly ripping out the layout.

AC Parasitics

"Just as PWB traces add unseen resistors to schematics, they can also add inductors, capacitors,and transformers."

I like the approach taken in this paper. Kollman first discussed how the device parasitics degrade the performance of capacitors, inductors, and transformers (including common-mode transformers). He then shows how PWB traces add to these parasitics and further degrade the device. He states that the performance of a capacitor can be ruined by the PWB even before it is mounted. There is a good discussion on parasitic inductance and the most effective approach of reducing it. There is also a good discussion of the layout of control circuits and minimizing the interaction with power components, including parasitic magnetic coupling. He ends with the following, which should be self-evident, but often is not.

"In summary, the layout of the power supply is crucial to maintaining the high frequency characteristics of the power components, this providing a satisfactory design.


"As with layout, grounding is one of those things that must be done correctly for a functioning circuit."

I think the greatest disservice inflicted on the circuit designer was the invention of the ground symbol -- because it propagates the fiction that an unvarying ground actually exists. In reality, there are only signals and their returns. This paper does give you an introduction to the problems with series, parallel, and ground-plane connections of return circuits. It points out the dangers of the ground plane and gives some ground rules to avoid them.

Personally, I prefer Lenz' law to ground planes. Make sure the nearest piece of metal is the intended return path. Since you make the signal and trace wide and close together to minimize inductance, my designs often look like they have a ground plane, but I never think that way. The advantage is that I don't have to remember all the ground-rules for removing metal from a ground-plane to avoid circuit problems due to excessive capacitance, undesirable common returns paths, etc.

One thing discussed in the paper that I had never seen as clearly before is the impact of the control IC grounding plan on layout of the PWB. Some ICs use a right-left separation of analog and power pins, others ICs split signal and power lengthwise. Which way the IC splits it can affect the PWB layout significantly.


"One of the key layout considerations in a power supply is removing the heat from components. Historically, that meant figuring out which components generated significant heat and mounting them to a heatsink. But as the power supply becomes integrated with the system, mounting components to a heatsink is becoming less attractive and there is a move to have the PWB act as the heatsink."

The lead-off quote is important because thermal design has greatly increased in difficulty. This paper does a good job of describing the reasons for the increased difficulty and provides some design solutions.

Design Examples

You can never have enough examples to clarify general discussions. There are some good ones here.


The authors summary has already been quoted in full.

Here is my summary.

This is an exceptional paper on layout. It has packed a tremendous amount of information in a relative small number of pages. If you understand everything that is in these 23 pages you are definitely on your way to be successful with the design of your power supply. One of the importantly things that I am glad he mentioned is the necessity of the power supply designer to work closely with the layout designer. Almost everything in layout is a compromise between conflicting requirements. If the layout designer is left to his own devices, he will probably make some poor choices. Only the circuit design who has made all the design tradeoffs and worked with his design in the lab has the background details necessary for the best decision.

I consider this a key paper to have in your personal library.


In the introduction, Topic 2 of SEM-1500 has nothing to do with layout. In Figure 28 and 29, the captions are the same saying both are the right way. Figure 29 shows the wrong way to connect output capacitors. In Figure 30 and 31 the captions are the same saying both are the right way. Figure 31 is the wrong way to connect sense leads.

Reference: Coleman, Robert, Constructing Your Power Supply - Layout Considerations, Texas Instruments 2004/05 Power Supply Design Seminar SEM1600, pp 4-1 to 4-23, 23 pages, 35 figures, 6 tables, 7 references, 2 appendices.

Author Abstract: Laying out a power supply design is crucial for its proper operation; there are many issues to consider when translating the schematic into a physical product. This topic addresses methods to keep circuit parasitic components from degrading the operation of your designs. Techniques to minimize the impact of parasitic conductance and capacitance of filter components and printed wiring boards (PWB) traces is discussed, together with the description of the impact that PWB trace resistance can have on power supply regulation and current capacity. A general overview of thermal design is also included as well as sample temperature rise calculations in a natural and forced air environment. Finally, some practical examples of Power stage and control device layouts are reviewed.

Posted by Jerrold Foutz at January 11, 2005 04:41 PM